Hack Memory

(Usage hints for this presentation)

IT Systems, Summer Term 2025
Dr. Jens Lechtenbörger (License Information)

Chair of Machine Learning and Data Engineering (Prof. Gieseke)
Dept. of Information Systems
University of Münster, Germany

1. Introduction

1.1. Today’s Core Question

What are bits, bytes, words, registers, RAM, ROM?
- Based on Chapter 3 of (Nisan and Schocken 2005)
- (We skip Project 3)

1.2. Retrieval Practice

Recall the Hack computer architecture preview
- What types of memory exist in Hack for what purposes?
- How do memory, ALU, and PC interact?
Please take a brief break and recall how the Hack computer architecture looks like, with its types of memory, the ALU as active component, and the program counter as pointer for the next instruction to execute.

1.3. Learning Objectives

Explain memory hierarchy
Explain functionality of RAM, ROM, PC
- In particular for Hack chips
Convert memory sizes (bits, bytes, larger sizes)

Agenda

1. Introduction
2. Memory
3. Hack Memory
4. Conclusions

2. Memory

2.1. Sequential Circuits

Previously, combinational circuits
- Output depends on input combinations
- Pure functions, e.g., Nand, ALU

Now, sequential circuits: Output depends on input combination, clock signal, and state
- Calculations based on sequence of (previous) inputs
  - Sequence triggered/synchronized by clock: one step or cycle per clock tick

Memory chips, RAM, ROM
Computer with RAM and CPU

2.2. Bit, Byte, Word

Bit (b): Smallest unit, zero or one
Word: CPU specific width for unit of processing
- Hack: 16 bits, more typical: 32 or 64 bits
Byte (B): 8 bits, typical unit of addressing in modern CPUs
- But not in Hack architecture
  - In Hack, addresses refer to 16-bit words, not to 8-bit bytes
- Byte can be understood as unsigned 8-bit integer
  - Between 0 and 255

2.2.1. Units for Memory

Base 10 and base 2 for larger (or smaller) quantities
- Systeme international d’unites (SI)
  - Prefixes based on powers of 10
  - “Normal”: kilo/k (\(10^3\)), mega/M (\(10^6\)), micro/μ (\(10^{-6}\)), nano/n (\(10^{-9}\)), …
    - 16 kB = 16,000 B (16 kilobytes)
- IEC (International Electrotechnical Commission)
  - Prefixes based on powers of 2
  - “New”: kibi/Ki (\(1024\)), mebi/Mi (\(1024^2\)), gibi/Gi (\(1024^3\)), …
    - \(16\) KiB = \(16 \cdot 1024\) B = \(16384\) B (16 kibibytes)
Typical convention
- For RAM (main memory), use powers of 2
- For disks (secondary memory), use powers of 10

2.3. Memory Hierarchy

Registers: Small memory, in CPU
“The memory hierarchy” Copyright (C) 2020 Dive into Systems, LLC under CC BY-NC-ND 4.0; from Dive into Systems
- Each register stores a word
- Small, expensive, fast (< 1 ns access)
RAM (main/primary memory): larger memory, on mainboard
- Think of array of registers
- Address input determines what register to access
  - Byte-addressed in real RAM, word-addressed in Hack
  - Read/write accesses possible in random order, at equal speed
- Still fast (100 ns access time)
CPU caches: Hierarchy of memory devices
- Copy of recently used data between RAM and CPU
- Level 1, L1: closest, smallest, fastest (1 ns access)
- Level 2, L2: farther away, larger, slower (4 ns access)
Secondary memory: Flash/solid-state disks (16 μs), traditional/hard disks (several ms)
- Much larger and slower, persistent, cheap

(Source for numbers)

Memory of modern computers can be arranged in the hierarchy shown here, with registers being the smallest, fastest, and most expensive pieces of memory that are directly embedded into processors. Each register stores just one word but can be accessed within a single CPU cycle as it is located directly inside the CPU.

RAM is considerably larger, e.g., on the order of gigabytes, but also about a factor of 100 slower. Thus, if a machine instruction requires access to data in main memory, that instruction will be about a factor of 100 slower than a similar instruction with data in registers. In other words, it might require 100 CPU cycles in contrast to 1 cycle. The reason for this slowdown is that data needs to be fetched through a so-called bus from RAM, covering a relatively large distance.

To amortize the cost of transferring data from RAM, recently accessed data is stored in so-called cache memory, which is located directly on the CPU chip. Subsequent accesses to data in caches is much faster than access to RAM. Typically, several levels of caches of increasing size and delay are located between CPU and RAM.

In addition to the memory types discussed so far, our computers usually also contain secondary memory on different types of disks or even on remote machines. Such memory is persistent in the sense that it keeps its contents even when powered off.

Note that in this hierarchy each level can be used as cache for memory below it: If data is copied from a lower level into a higher level, subsequent accesses benefit from the increased speed of the higher level. As memory at higher levels is relatively small, one needs to select carefully what to store. We will revisit this thought in the context of virtual memory for operating systems.

3. Hack Memory

3.1. Memory Chips

Sequence of chips of increasing sizes
- Built-in DFF and Bit
  - Single bit
- 16-bit Register for one word
- RAM8, RAM64, RAM512, RAM4K, RAM16K
  Figure under CC0 1.0
  - RAM chips of increasing sizes (8 words, 64 words, …)
    - With inputs in, address, load; output out
    - If load is 1, store in at address; otherwise, keep state
    - Output current contents at address as out
  - RAM16K: \(2^{14} = 16384\) words

3.2. Hack ROM

Nand to Tetris with built-in chip ROM32K
Figure under CC0 1.0
- Input address[15]
- Output out[16]
- (\(2^{15} = 32768\) words)
Output current contents at address as out
- Only reading, contents written upon fabrication
- (Later: ROM initialized with instructions when program is loaded)

3.3. Hack PC

Recall: Program Counter (PC) holds address of next machine instruction to execute
Figure under CC0 1.0
- Inputs
  - in[16],
  - Control bits: reset, load, inc
- Output out[16]

Output current register contents as out

Logic

if reset then store 0
   elif load then store in
     elif inc then increment stored value
       else keep state

4. Conclusions

4.1. Summary

Memory organized in hierarchy of levels
- Considerable differences regarding size, speed, cost
- From registers over caches to RAM and secondary storage
  - Registers located inside CPU, including the program counter
RAM can be understood as array of registers
- RAM is byte-addressed in real hardware, word-addressed in Hack
Outlook
- CPU includes registers
- Computer includes registers, RAM, ROM

4.2. Self-Study

Play with RAM16K and PC in Hardware Simulator
Figure under GPLv2
- (Use built-in chips)
- Note
  - Area for RAM contents
  - For RAM16K, address enumerates 16-bit words, neither bits nor bytes

How large is RAM16K in bits, bytes, words, KiB?

Bibliography

Nisan, Noam, and Shimon Schocken. 2005. The Elements of Computing Systems: Building a Modern Computer from First Principles. The MIT Press. https://www.nand2tetris.org/.

License Information

Source files are available on GitLab (check out embedded submodules) under free licenses. Icons of custom controls are by @fontawesome, released under CC BY 4.0.